Interface comprising a thin PCB with protrusions for testing an integrated circuit

ABSTRACT

The invention relates to a test device for testing an integrated circuit called test circuit, comprising a plurality of housings intended to be tested in a printed circuit called main circuit. The device comprises an insulating membrane of soft material having two opposite surfaces covered by two conductive layers interconnected by via holes and intended to be in contact with the test circuit and the main circuit respectively, under the influence of a pressure exerted during the test between the test circuit and the main circuit pressing the test device. Protrusions are arranged on at least one of the two layers in a predefined pattern as a function of said pins, tabs, pads etc. of the test circuit so as to ensure a contact quality between said layer and the circuit (to be tested or the main circuit) having contact with said layer under the influence of said pressing action.

RELATED APPLICATION DATA

The present application is a 371 of PCT/IB03/03899 filed on Sep. 4,2003.

The invention relates to the domain of integrated circuits. Moreparticularly the invention relates to a test device and a test methodfor testing an integrated circuit called test circuit, intended to betested in a printed circuit called main circuit.

The invention has for an object to ensure the contact between the testboard (printed circuit) and the component to be tested as such.Moreover, the invention permits to test various types of casings(encapsulating the same integrated circuit or of the same family) withthe aid of the same test board or laboratory model called main printedcircuit (the latter initially being designed for one type of casing).

The invention is applied to all types of integrated circuit tests,notably the test during production (bulk), the laboratory test or alsothe reliability/quality test called burn-in.

The invention is particularly advantageous for the test of integratedcircuits operating at high frequencies of the order of 2 GHz, forexample, notably of the type of power amplifiers for cell phones, radiofrequency circuits for cell phones, circuits for video application (TVand satellite decoder) as well as all the integrated circuits conveyinghigh frequency/radio frequency (HF/RF) signals.

There are numerous types of test devices often called test sockets ofthe type mentioned in the opening paragraph, which are used duringproduction to protect the main test circuit or board and avoid itspremature wear during the repeated passing of elements to be tested.These devices or test sockets have a certain thickness and a certaincontact length (micropoint contact or pogos, Johnstech contact in theform of an S, elastomer contact etc.) which render the test of circuitsoperating at high frequency difficult or even impossible. Moreover, theyare often very expensive. Actually, high-frequency circuits like, forexample, power amplifiers generally do not tolerate any additionalcontact length because they are very sensitive to the inductance causedby the test device itself.

Types of integrated circuits are generally tested with the techniquecalled True Plunge To Board (TPTB) according to which the test circuitis directly inserted into the test board (main circuit), without anyadditional device. In the particular case of casings of the HVQFN(Heatsink Very thin Quad Flat Package No leads) which are housingswithout pins or lugs, but having only flat contact areas called “pads”,this TPTB technique requires considerable support force of the order ofa minimum of 120 Newton to obtain sufficient electrical contact. After acertain number of pieces that have passed on the same TPTB test board,for example, of the order of 200,000 pieces, or a week's production fora bulk circuit, the board is used until it becomes unusable because theplace of contact with the test circuit is completely destroyed by thepassing of the pieces. It is then necessary to manufacture a new testboard, which takes a long time to perfect and is costly.

It is an object of the invention to remedy this disadvantage.

This object is achieved with a test device comprising an insulatingmembrane of elastic material having two opposite surfaces covered by twolayers of conductive tracks interconnected by connection means, in whichprotrusions are arranged on at least one of said layers in a predefinedpattern as a function of the position of the contacts (pins, pads, ballsetc.) of the integrated circuit to be tested, so as to ensure a contactquality between said layer and the circuit (the test circuit or the maincircuit) in contact with said layer.

The elasticity or softness of the membrane permits to obtain goodcontact by absorbing differences in flatness between the test circuitand the main circuit, the performance of the device being all the moreinteresting as the membrane is thin. The protrusions permit to improvethe connection quality by increasing the degree of friction between theparts to be contacted. The two interconnected conductive layers oneither side of the membrane form a system which permits to reduce thelength of the contacts of the device.

The invention also proposes a test method comprising installing anintegrated circuit in a given housing of a set of housings of differenttypes (for example, of the types HVQFN, HVSON, Heatsink Very thin SmallOutline package No leads, LQFP Low Quad Flat Package with 32 or 64 pins,etc.), the integrated circuit being intended to be tested successivelyin various types of housings of said set with the aid of a single testboard or main circuit, and the installment of a set of associated testdevices or test sockets adapted to the various types of housings to betested on the same test board.

Advantageously, this method permits to avoid redeveloping a new testboard to sample the test circuit with each new housing, which representssubstantial time saving and saving of hardware resources notably forcircuits operating at high frequencies. The same test board can thus beused again with a different test device (or test socket or also thin PCBcontact with protrusion) of which one surface (conductive layer) isadapted to the main circuit and the other to the type of housingconsidered.

These and other aspects of the invention are apparent from and will beelucidated, by way of non-limitative example, with reference to theembodiment(s) described hereinafter.

IN THE DRAWINGS

FIG. 1 is a diagrammatic representation called outline of an example ofa device according to the invention,

FIG. 2 is a diagrammatic representation in cross-sectional view of adetail of an example of a device according to a first embodiment of theinvention,

FIG. 3 is a diagrammatic representation in cross-sectional view of adetail of an example of a device according to a second embodiment of theinvention,

FIG. 4 is a diagrammatic representation in plan view of the detailillustrated in FIG. 3,

FIG. 5 is a diagrammatic representation in cross-sectional view of thedetail illustrated in FIG. 3 during a test operation,

FIG. 6 is a diagrammatic representation in plan view of part of thedevice according to the second embodiment of the invention.

The production of low-priced integrated circuits needs to haveconsiderable sale volumes to be profitable. The test method beforedelivery must be industrial and automatic to permit high rates.Integrated circuits are tested by establishing contacts with theirterminals, pins, tabs, pads or balls etc., the name varying as afunction of the type of housing, hereinafter generally indicated ascontacts.

FIG. 1 represents a test device according to the invention to serve asan interface between an integrated circuit to be tested and a testcircuit or board, also called load board, called main circuit, with theaid of which the integrated circuit is to be tested. Most of thecharacteristic features of the invention are not visible in FIG. 1 butare visible in the other Figures. The test circuit (not shown in FIG. 1)comprises a plurality of housings intended to be tested with the aid ofthe test board or main printed circuit (not shown in FIG. 1). The devicecomprises an insulating membrane 1 made of a material that has a certainsoftness and has two opposite surfaces 2 one of which is visible in FIG.1, covered by two conductive layers 3 one layer of which corresponds tothe visible surface and is visible in FIG. 1, interconnected byconnection means such as, for example, vias (not shown in FIG. 1) andintended to enter into contact with the test circuit and the maincircuit respectively, thanks to a deformation of the test deviceobtained from a pressure exerted during the test between the testcircuit and the main circuit. Protrusions (not shown in FIG. 1) arearranged on at least either of the two layers in a predefined pattern asa function of the places of the contacts (pins, tabs, pads, balls etc.)of the test circuit so as to ensure a sufficient contact quality betweenthe conductive layer supporting the protrusion and the circuit (this mayeither be the test circuit or the main circuit) in contact with saidlayer under the influence of pressure.

The test device/socket shown in FIG. 1 is a printed circuit called PCB(Printed Circuit Board), preferably thin, that is to say whose totalthickness does not go beyond 400 micrometers, has protrusions serving toensure proper contact between the test board or main circuit and thetest circuit. The device plays a role of insert between the main printedcircuit (industrial test board or laboratory model) and the component(test circuit) which is to be subjected to the test sequence. Thecomponent is generally enveloped in the housing to be able to manipulateit more easily without damaging the crystal that is inside. Supportingthe device can be ensured by positioning studs 4. The maximum tolerablemechanical dimensions (without deformation of the support) X and Y areabout 40 mm×40 mm. The outside form of the device may be arbitrarybecause it is to be adapted to any test circuit or board.

The example of the device illustrated in FIG. 1 is a conventionalprinted circuit with 2 layers, that is, one membrane preferably made ofKapton, registered trademark of Du Pont, or possibly of epoxy glass ofthe type FR4 which is less soft than Kapton and whose thickness does notexceed 0.1 mm, forming the support of the device put on these twoopposite surfaces of two copper layers interconnected by vias. In orderto have a better contact quality between the 2 printed circuits mountedon top of each other, the thin device has small protrusions in the formof truncated cones (or balls, cylinders etc.) on one surface or also onthe two surfaces at will, depending on the type of housing to be tested.

FIG. 2 represents in partial cross-section the membrane 21 to show aprotrusion in the form of a truncated cone 22 engraved on the conductivelayer of the upper surface 22 a connected to the conductive layer of thelower surface 23 b by a via 24. Preferably, the height of a protrusionis to be more than 45 μm (micrometers) and its diameter which depends onthe contact dimensions of the housing may be, for example, less than orequal to 125 micrometers. Protrusions may be present on the two surfacesof the membrane and may have different heights. These protrusions may beconstituted by a copper layer of at least 40 mm thickness, for example,covered by a layer of nickel from 5 to 10 μm, for example, for a betterresistance over time, as well as a fine layer of gold of about 0.5 μm toobtain good conductivity. The support (membrane) may be constituted byKapton of 0.1 mm.

When a new integrated circuit appears on the market, it is accommodatedin a type of housing particular for a client's application or as afunction of the application for which the circuit is meant. This circuitis tested after its encapsulation in the housing thanks to test boardswhich are developed as a function of the chosen housing which has itsown characteristics. These boards are thus specifically dedicated to aspecific type of housing and the central test print is thus definitelymade inflexible. When a client wishes to have the same circuits (thesame crystals) mounted in different housings in view of otherapplications, new test boards have to be developed again in thelaboratory and on the production line to sound the client out about thisnew housing. This operation is very costly and may take very long intime of adjustment for circuits operating at high frequencies.

In an advantageous manner, the invention permits to avoid redeveloping atest circuit for each new housing. In fact, it is sufficient tomanufacture one test device that is not very costly for eachcontemplated type of housing. One surface of the device comprises tracksadapted to the new housing whereas the tracks of the opposite surfaceare adapted to the test board already developed. The test devicedescribed above thus always plays the role of a housing converter byrealizing the adaptation of the test circuit to a new housing. Theadvantages are numerous:

reduction of the force to be exerted on the housing of several Newton toobtain a sufficient electrical contact,

gain of time and money by avoiding development of new test boards,hardware stability thanks to total compatibility with the existing board(laboratory or test),

time gain for the evaluation of the circuit mounted in a new housing,

time gain for the choice of the best housing by permitting to evaluatevarious housings (with the same circuit inside) on a sole similarlaboratory model, and

time gain for launching a new product on the market thanks to thepossibility of rapidly sounding the client out about new housings.

The invention first permits to improve the commercial relations withpotential clients by their avoiding a time loss and additionaldevelopment costs when they decide to change a type of housing.Therefore, the invention recommends the joint delivery of an integratedcircuit in a housing given from a set of different types of housingscalled test circuit intended to be tested with the aid of a test boardcalled main circuit and a set of test devices corresponding to the setsof housings, adapted to said test circuit as a function of each type ofhousing considered.

The following Figures illustrate a particular embodiment of theinvention. In the case of high-power radio-frequency circuits (such aspower amplifiers for a cell phone), the global contact system (maincircuit+test device) is to show a resistance of several milliohms and aninductance that is lower than several dozen nanoHenri for the contacts(pins etc.) and lower than several hundred nanoHenri for ground. This isnecessary for a correct operation at radio-frequency level. Theresistive aspect is due to the quality of the contact system and theinductive aspect to the dimensions of this same system.

The embodiment illustrated in FIGS. 3 to 6 is particularly adapted tothe test of the radio-frequency integrated circuit (<2.4 GHz) in ahousing of the type HVQFN16 (housing of 4×4 mm, 16 pads having onecentral exposed die pad). This housing has metallic pads of 0.5 by 0.25mm at the location of the connection tabs or pins. It constitutes withthe printed circuit that accommodates it an extremely static systemsince there are at least 17 contact points to be established.

FIG. 3 represents the detail of a pattern of a test device according tothe embodiment mentioned above. The soft insulating membrane 31comprises protrusions 32 a and 32 b arranged in pairs on the twoconductive layers. Each element of the pair is situated on an oppositelayer 33 a and 33 b on either side of the connection means 34, so as toperform a changing of the elastic membrane 31 during the pressing actioncarried out during the test to keep the test circuit in contact with thetest board via the test device which plays the role of interface. Thesoftness of this membrane is used to absorb the differences of flatnessbetween the housing and the printed circuit. The patterns play the roleof switch when the housing is pressed on. Moreover, during this change,friction occurs between parts to be contacted due to the protrusions,which improves the quality of the connection.

FIG. 4 represents a partial view from above (omission of the membrane)of the detail of the pattern represented in FIG. 3. References of FIG. 3are replaced by new references in which only the Figure of the tens hasbeen replaced by the FIG. 4. The parts not shown corresponding to thelower surface are represented in dotted lines. The protrusions 42 a and42 b appear on each conductive layer 43 a and 43 b respectively as wellas a via 44 represented in gray in the Figure, which permits tointerconnect the two layers. A pattern is then constituted by twoelongated pads engraved in said opposite layers 43 a and 43 brespectively, shifted relative to each other and interconnected byconnection means, here vias 44.

FIG. 5 shows the test printed circuit, a pattern of the test device andthe test printed circuit in its housing. The pattern of the test devicerepresented in FIG. 5 is identical with the one represented in FIG. 3but it is represented in a switching position. The references of FIG. 3are replaced by new references in which only the Figure of the tens hasbeen modified, between FIG. 3 and FIG. 5, and has been replaced by theFIG. 5 for the references 51 to 54. The switching position is obtainedby the pressure exerted during the test operation on the test integratedcircuit. The test device is positioned between the main circuit or testboard 55 covered with, on the one hand, these conductive tracks 56 andthe test circuit in its housing 57 from where the contacts to be testedare accessible in the form of a conductive pad 58, on the other. Theprotrusions of each opposite conductive layer 52 a and 52 brespectively, are in contact with the corresponding conductive pads ofthe test circuit 58 and of the main circuit 56, respectively. Thehousing that has just been pressed on this pattern will deform themembrane to switch the pattern relative to the axis of the via so as toproduce the contact by absorbing differerices of flatness.

FIG. 6 represents a partial plan view of a test device to illustrate acomplete example of a pattern 60 of the protrusions. In solid lines aredrawn the patterns engraved on the front surface of the device. Theengraved patterns on the back-surface appear in dotted lines in thedrawing. The openings or vias realizing the connections between theprotrusions of the upper and lower surfaces of the device are shown ingray. The protrusions are represented by circles as shown in FIG. 4. Thepatterns are formed by oblong copper pads engraved on either one of thetwo sides of the membrane and shifted relative to each other. These twopads are connected to each other by a via. A pillar growth of copperwhich gives rise to a protrusion is realized at the locations where theconnection is wanted. A layer of nickel having a thickness between 5 and10 μm covers the copper to increase the mechanical resistance. Afinishing of gold on the thin (<1 μm) nickel layer improves the qualityof the contact. This pattern is repeated 16 times to obtain contact withall the pins of the housing. The part called exposed die pad, situatedin the center of the housing is a metallized pad of 2 mm by 2 mm whichis also to be connected. This refers to radio-frequency ground. Itcomprises a large number of patterns to minimize the inductance of thecontact at this location. This system is applicable to all the tableshousings with co-planar contact pads notably of the type HVQFN andVSOFN.

1. A test device for testing an integrated circuit comprising aplurality of contacts, called a test circuit, intended to be tested withthe aid of a test printed circuit, called a main circuit, the testdevice comprising: an insulating, non-conductive membrane of a softmaterial having two opposite surfaces; two conductive layers eachcovering a respective one of the two opposite surfaces of saidnon-conductive membrane; connection means for interconnecting said twoconductive layers, said two conductive layers being adapted to come intocontact with the test circuit and the main circuit respectively, underthe influence of a pressing force exerted during the test between thetest circuit and the main circuit deforming the test device; andprotrusions arranged on at least one off said two conductive layersaccording to a predefined pattern as a function of said plurality ofcontacts of the test circuit, so as to ensure a contact quality betweensaid at least one layer and the test circuit or the main circuit incontact with said at least one layer, under the influence of saidpressing force.
 2. A test device as claimed in claim 1, wherein saidconnection means are metallized holes passing through said membrane andsaid two layers.
 3. A test device as claimed in claim 1, wherein thetest device has a thickness less than or equal to 0.4 millimeters.
 4. Atest device as claimed in claim 1, wherein said non-conductive membranehas a thickness less than or equal to 0.1 millimeter.
 5. A test deviceas claimed in claim 1, wherein said protrusions have a height largerthan or equal to 45 micrometers.
 6. A test device as claimed in claim 1,wherein said protrusions have a diameter relative to the surface of saidcontacts.
 7. A test device as claimed in claim 1, wherein said membraneis made of Kapton.
 8. A test device as claimed in claim 1, wherein saidprotrusions are arranged in pairs on each of said two layers, eachelement of the pair being situated on an opposite layer on either sideof said connection means, so as to perform a change of the soft membraneunder the influence of said pressing force.
 9. A test device as claimedin claim 1, wherein said protrusions are in the form of a truncatedcone.
 10. A test device as claimed in claim 1, wherein said protrusionsare engraved onto said at least one of said two conductive layers.
 11. Atest device as claimed in claim 1, wherein said protrusions are arrangedon both of said two conductive layers.
 12. A test device as claimed inclaim 11, wherein said protrusions on one of said two conductive layersare offset from said protrusions on the other one of said two conductivelayers with said connection means being arranged between saidprotrusions.
 13. A test device as claimed in claim 1, wherein said twoconductive layers comprise two layers of conductive tracks.
 14. A testdevice for testing an integrated circuit comprising a plurality ofcontacts, called a test circuit, intended to be tested w.ith the aid ofa test printed circuit, called a main circuit, the test devicecomprising: an insulating, non-conductive membrane of a soft materialhaving two opposite surfaces; two conductive layers each arranged on arespective one of the opposite surfaces of said membrane; a connectiondevice which interconnects said two conductive layers, said twoconductive layers being adapted to contact with the test circuit and themain circuit respectively, under the influence of a pressing forceexerted during the test between the test circuit and the main circuitdeforming the test device, said connection device being metallized holespassing through said membrane and through said two conductive layers;and protrusions arranged on at least one of said two conductive layersaccording to a predefined pattern as a function of said plurality ofcontacts of the test circuit, so as to ensure a contact quality betweensaid at least one layer and the test circuit or the main circuit incontact with said at least one layer, under the influence of saidpressing force.
 15. A test device as claimed in claim 14, wherein saidprotrusions are arranged on both of said two conductive layers.
 16. Atest device as claimed in claim 15, wherein said protrusions arearranged in pairs with one of said metallized holes being situatedtherebetween, a first protrusion of each pair being situated on a firstone of said two conductive layers on one side of a respective one ofsaid metallized holes and a second protrusion of each pair beingsituated on a second one of said two conductive layers on an oppositeside of said respective one of said metallized holes whereby saidprotrusions are thereby offset from one another.
 17. A test device asclaimed in claim 14, wherein said two conductive layers comprise twolayers of conductive tracks.
 18. A test device as claimed in claim 14,wherein said two conductive layers cover the respective one of theopposite surfaces of said membrane.